IP 32/64/128K Stream FFT Cores DEMO

The "128K FFT Streaming IP Demonstraton" is a demo application project embedding the "128K FFT Streaming IP" to demonstrate its functionalities. The provided demo firmware is ready to be installed and run on an Altera evaluation board (NIOS Stratix II S180) equipped with an Ethernet Gigabit PHY board. The demo project embeds the "128K FFT Streaming IP" with a NIOS processor and a Gigabit UDP/IP Ethernet and it is able to process an input stream of a digital complex samples (I+jQ) and to produce an output stream of digital complex samples containing the Real and Imaginary parts of the Fourier transform of the stream in input. The two streams are received (sent) to (from) the demonstrator board on a Gigabit Ethernet channel (UDP/IP protocol) at a maximum rate of 1 Gigabit's.

Deliverable list:
  • VHDL files of the "128K FFT Streaming IP"
  • VHDL files of the "128K FFT Streaming IP Demonstrator"
  • PC Software
  • Manual implementation

  • Full hardware/software/firmware set-up (see diagram) including n. 2 Stratix II boards and n. 1 PC laptop.
IP 32/64/128K Stream FFT Cores DEMOIP 32/64/128K Stream FFT Cores DEMO